Sizing the Design - Selecting the Array
Last Edit July 22, 2001
Interface cell functionality
Interface cells are designed to support TTL-translators, ECL-translators
and most of the required buffers for external interfacing to both ECL
and TTL. The amount of buffering, the capability of the cell to support
high fan-out drivers, single-cell bidirec tional macros, ECL output terminations
to 25 or 50 ohms, and elementary logic possible in an interface cell varies
by array series.
For many of the arrays, the input macros also provide simple AND/NAND
or OR/NOR logic or high fan-out driver operations. The output macros for
TTL contain OR or NOR operations and those for ECL may contain these operations
plus others as complex as a latch or a 2:1 MUX. This is in addition to
level translation and buffering functions. The amount of logic contained
within an interface macro is series-dependent; it is a function of the
I/O cell complexity and the components available within the cell.
Variability in I/O design
The various array series and even arrays within a series differ in their
approach to interface. The following gives an idea of the choices that
have existed on the arrays from one vendor. Similar variability and evolution
can be traced for other vendors.
- The Q700 Series used unbuffered I (input-only) and I/O (input, output
or bidirectional) cells that require a buffer for each input and each
output macro. The buffer macros were placed on internal cells (L or
B), reduc ing the L-cells available for internal logic functions. There
was a D-cell on one array in the series to provide a pin-restrictive
three-state enable driver that could drive more than eight loads. A
bidirectional macro was composed of one interface and two buffer cells.
- The Q1500A array used I (input-only) and O (output-only) cells, with
buffering either in the input or output macro or in a separate macro.
The BExx macros were for ECL output buffering, for example, and were
placed on a B cell. TTL input buffers are part of the input macro that
was placed on an I cell. Bidirectionals were constructed from two macros
on two adjacent cells using the same methods now used on the Q14000
- The QH1500A array used I and I/O cells, with buffering included in
the input, output, and bidirectional macros the first time all buffers
were removed from the internal cell area. The I/O cell could support
single -cell bidirectional macros.
- The Q3500 and Q5000 Series use I/O cells only, with buffering included
in the input, output and bidirectional macros.
- The Q1500, Q3500 and Q5000 Series also provide unbuffered ECL input
and the buffered logic macros to support it. The BIxx series macros
are made up of representative logical functions from the rest of the
macro library (gates, EXOR networks, latches, flip/flops, MUXs and decoders)
which also includes the ECL input buffering function on selected input
pins. The BIxx macros are placed on internal macros (L or B). The selected
pins are pin-restricted to be driven by any unbuffered ECL input macro.
- The unbuffered ECL input macro does not suffer any degradation in
speed due to loading delay, the only macro to behave in this manner.
It can drive eight loads. Load capacitance presented to the source driving
the unbuffered ECL input increases by 1 pF per fan-out.
- The Q14000 Series uses I/O cells, with buffering and logic as is used
in the Q5000 Series. Single cell bidirectional macros can only be used
on the Q9100B or Q2100B and then only in specific "special-I/O"
cell loca tions. Additional bidirectional macros must be built from
one input and one output macro.
- The Q20000 Series uses I/O cells, with buffering but no logic functions.
TTL outputs (output macros and bidirectional macros) are limited to
a number that varies per array. ECL outputs are also limited. The bidirec
tional macros use two-cells and provide an added ground pad by using
the left-over pad.
- Most 25 ohm termination macros require two I/O cells. The Q20000 Series
provides a single-cell 25 ohm termination macro but limits its use to
arrays using two power supplies. Darlington macros are limited to arrays
with two power supplies.
- The Q20000 Series uses four fixed I/O signals per array. These signals
are used by the on-chip thermal diode (one anode and one cathode) and
the on-chip AC speed monitor (one is power and the other is an output
signal). These four pads and cells are not available for use with any
Bidirectional macros can be two-pin, one-pin, one-cell or two-cell macros.
If an array series has no bidirectional macros, they may need to be constructed.
Watch out for incompatibility with the workstations - a work-around may
be required for proper simulation of bidirectional macros.
If more bidirectional macros are needed, they are constructed from two
macros, one input and one output, and placed on two adjacent I/O cells.
The two macros can be tied together into one package pin, but this requires
two test vector sets, one for wafer sort and one for packaged part testing.
They are usually tied together outside of the package to keep testing
simplified, but this requires two package pins.
A third approach not liked by the array vendors is to stitch two macros
together in the interconnect so that only one pad and one pin are used.
Anytime that hand-edits or customization of the interconnect or base is
involved, both time and money are required, and debugging time may need
to be increased.