Adding Programming Support to the Controller
Last Edit September 24, 1996; May 1, 1999; July 7, 2001
AMD's Am2909/11 (1970s-1980s)
The CCU logic blocks, the register, the stack, the pointer, the
µPC, the incrementer and the next-address select MUX all exist
as a single device, the Am2909/11 microprogram sequencer (see Figure
Figure 3-8 CCU with Am2909, Am2911A
The Am2909 and Am2911 differ in package size. The Am2911 has one
input to the D (direct) position of the next-address MUX, which
is shared with the input to the register (R), while the Am2909 has
separate inputs for each. The Am2909 has OR inputs which allow the
outputs of the CCU to be logically ORed with outside data.
Both the Am2909 and Am2911 are bit-slice devices, 4 bits
wide and expandable to any width in multiples of four. The typical
configuration was three Am2909/11 units and one Am29811. The devices
were tied together through the Cin and Cout
lines of the incrementer.
Three such devices can access 212 (2**12) words or a
4K ROM memory. A reasonably sized CCU might have a PROM memory between
4K and 16K. Controllers have smaller memories, usually less than
4K, depending on the particular application. At least one computer
was constructed using bit-slice with a PROM of less than 2K.
CASE Statement (AMD's Am29803 (1970s-1980s))
There is one other desirable programming structure, the CASE
statement or n-way branch. With conditional testing via the
IF-THEN-ELSE structures, one test is performed at a time and branching
is to one of two directions depending on the result of the test.
An n-way branch performs one test and then branches to one of n
locations based on the test.
The Am29803 is a testing matrix which connects to the OR inputs
of the Am2909. Up to four test inputs may be connected to the Am29803
inputs. A 4-bit encoded instruction selects none, one, two, three
or all four test inputs to produce up to a 16-way branch in one
As a sample application, consider the situation where two Am2911
units supply the 8 high-order address bits and one Am2909 supplies
the last four bits. When a test is to be performed, the branch address
of the start of the branch table is output by the sequencers. With
the configuration indicated, the branch address table must
be located within the microprogram memory such that its first address
ends in four zeros (binary). The test produces four bits which are
internally ORed to the Am2909 outputs and which select the specific
address within the branch table. The branch table is then no more
than a set of jump (JMP; GOTO) instructions.
Suppose that you are to test four conditions and decide what to
do next, based on the results of the four tests. The software would
contain 15 jump instructions for testing, and it would be necessary
to execute four instructions to complete the decision. With the
Am29803, the four tests are input and an encoded result produced.
A 15-deep jump instruction branch table is sufficient, and only
two jump instructions need to be executed:
- one to the branch table
- one as a result of landing within the table
To use the Am29803, a four-bit instruction field must be added
to the microword. A branch instruction is executed with the pipeline
field supplying the Am29803 instruction to be executed in parallel
with the Am2909 instruction. Since the branch address is the one
produced by ORing the Am29803 outputs to the Am2909, the Am29803
is disabled by sending the appropriate instruction and execution
A typical CCU structure with some Am2909/11 units, an Am29811A
and an Am29803 is shown in Figure 3-9.
Figure 3-9 Typical CCU using the Am2909, Am2911, Am29803A, and
Am29811A. Note that the least significant microprogram sequencer
is an Am2909 and the more significant sequencers (referring to numeric
significance) are Am2911 units.